Compositions and methods for planarizing or polishing the surface of a substrate are well known in the art. Polishing compositions (also known as polishing slurries) typically contain an abrasive material in an aqueous solution and are applied to a surface by contacting the surface with a polishing pad saturated with the slurry composition. Typical abrasive materials include silicon dioxide, cerium oxide, aluminum oxide, zirconium oxide, and tin oxide. U.S. Pat. No. 5,527,423, for example, describes a method for chemically-mechanically polishing a metal layer by contacting the surface with a polishing slurry comprising high purity fine metal oxide particles in an aqueous medium. Alternatively, the abrasive material may be incorporated into the polishing pad. U.S. Pat. No. 5,489,233 discloses the use of polishing pads having a surface texture or pattern, and U.S. Pat. No. 5,958,794 discloses a fixed abrasive polishing pad.
Conventional polishing systems and polishing methods typically are not entirely satisfactory at planarizing semiconductor wafers. In particular, polishing compositions and polishing pads can have less than desirable polishing rates, and their use in chemically-mechanically polishing semiconductor surfaces can result in poor surface quality. Because the performance of a semiconductor wafer is directly associated with the planarity of its surface, it is crucial to use a polishing composition and method that results in a high polishing efficiency, uniformity, and removal rate and leaves a high quality polish with minimal surface defects.
The difficulty in creating an effective polishing system for semiconductor wafers stems from the complexity of the semiconductor wafer. Semiconductor wafers are typically composed of a substrate, on which a plurality of transistors has been formed. Integrated circuits are chemically and physically connected into a substrate by patterning regions in the substrate and layers on the substrate. To produce an operable semiconductor wafer and to maximize the yield, performance, and reliability of the wafer, it is desirable to polish select surfaces of the wafer without adversely affecting underlying structures or topography. In fact, various problems in semiconductor fabrication can occur if the process steps are not performed on wafer surfaces that are adequately planarized.
The use of acids in chemical-mechanical polishing compositions is commonly known in the art. For example, U.S. Pat. No. 5,858,813 describes a polishing composition comprising an aqueous medium, an abrasive, an oxidizing agent, and an organic acid, which purportedly enhances the selectivity of metal to oxide polishing rate. U.S. Pat. No. 5,800,577 describes a polishing composition comprising a carboxylic acid, an oxidizing agent, and water with the pH adjusted with an alkali metal to between 5 and 9. U.S. Pat. No. 5,733,819 describes a polishing composition comprising silicon nitride fine powder, water, and an acid. U.S. Pat. No. 6,048,789 describes a polishing composition comprising nitric and hydrofluoric acids for etching silica.
Acid buffers are used to control the pH of a polishing composition and, thus, maintain the polishing efficiency and uniformity of the polishing composition over time. For example, U.S. Pat. No. 6,190,237 describes a two-step polishing system comprising first step polishing with an acidic (pH=1 to 6) polishing composition followed by second step polishing with a neutral polishing composition comprising an abrasive and a pH buffering component (i.e., an acid or a salt thereof with a base or salt thereof), which purportedly maintains the desired pH of the second composition despite the presence of residual acidic polishing composition from the first step, thereby preventing the loss of polishing performance. U.S. Pat. No. 6,238,592 describes a polishing composition comprising an oxidizer, a passivating agent, a chelating agent, optional abrasive, and an ionic buffer to control pH (e.g., an acid in combination with its conjugate base salt) for use in semiconductor polishing.
Acids are also employed for cleaning semiconductor surfaces after completion of CMP. For example, U.S. Pat. No. 6,169,034 describes a method of removing abrasive particles from a semiconductor surface after CMP using a dilute acidic solution without buffing or scrubbing. U.S. Pat. No. 6,143,705 describes the use of a cleaning agent comprising an organic acid with carboxyl groups and a complexing agent with chelating ability.
A need remains, however, for polishing systems and polishing methods that will exhibit desirable planarization efficiency, uniformity, and removal rate during the polishing and planarization of substrates, while minimizing defectivity, such as surface imperfections and damage to underlying structures and topography during polishing and planarization.
The present invention seeks to provide such a chemical-mechanical polishing system and method. These and other advantages of the invention will be apparent from the description of the invention provided herein.